L2 State

Entering L2

Enter the L2/L3 Ready state first. And if the Vaux is availabe, the Link enter the L2 state.

At this state, the main power is no longer available. There's only Vaux. Can only be woken up by side band signal (WAKE#) or beacon signal.

Exiting L2

Needs to start from Detect and redo all the link training before the link can reach L0 again.

References

Videos

Links

• 2.15.2 Link State Power Management, KeyStone Architecture Peripheral Component Interconnect Express (PCIe): for the L-state diagram.
• The Importance of Efficient SSD Power Management, PHISON Blog: for L-state diagram.